Conventional fast Fourier transform circuits that support a plurality of communication schemes (hereinafter “multimode fast Fourier transform circuits”) include, for example, the one disclosed in Patent Document 1.
FIG. 1 is a block diagram showing a configuration of the conventional multimode fast Fourier transform circuit disclosed in Patent Document 1.
Multimode fast Fourier transform circuit 1 shown in FIG. 1 employs a configuration having serial/parallel conversion circuit 11, serial/parallel conversion circuit 12, switch 13, FFT (Fast Fourier Transform) circuit 14, parallel/serial conversion circuit 15, puncturing circuit 16, amplitude adjusting circuit 17, zero-signal generating circuit 18, serial/parallel conversion circuit 19 and combiner 20.
This circuit 1 supports the OFDM (Orthogonal Frequency Division Multiplexing) scheme requiring FFT processing for P (=2048) points and the OFDM scheme requiring FFT processing for Q (=64) points and performs FFT processing for P points in either scheme. Here, when circuit 1 receives a signal of the OFDM scheme requiring FFT processing for Q points, FFT processing for P points is performed by combining the received signal and data of zero values outputted from zero-signal generating circuit 18 in combiner 20 and converting Q sequences of parallel data into P sequences of parallel data.    Patent Document 1: Japanese Patent Application Laid-open No. 2004-186852 (FIG. 3)